Conceptually, analog-to-digital conversion is performed in two steps: an analog input signal is sampled, and then the sample is quantized into a digital output value. There are many implementations for performing this two-step process, each of which can be differentiated based on its associated power consumption, conversion speed, and/or area.
One such implementation is the successive approximation register (SAR) analog-to-digital converter (ADC). The SAR ADC is popular for its comparative power and area advantages over other implementations, making it ideal for use in many portable and battery powered devices. As its name implies, the SAR ADC works by successively comparing a sample of an analog signal to an analog representation of the sample's digital approximation. The digital approximation is updated based on each comparison in accordance with a binary search algorithm to more accurately represent the analog sample until a final digital approximation is produced.
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